Design and method for plating PCI express (PCIE) edge connector

ABSTRACT

Embodiments of methods and apparatus for plating a PCI Express edge connector are described. In one embodiment a printed circuit board having connectors is employed for electroplating one or more of the connectors formed thereon. The printed circuit board comprises a substrate having one or more layers, and a plurality of connectors formed on one or more of the layers, wherein at least one connector includes at least one short pin and at least one extra pin. The at least one extra pin extends beyond an outer shape of the printed circuit board after fabrication. The printed circuit board also includes connection circuitry formed on one or more of the layers, wherein the connection circuitry is configured to electrically connect the short pin with the extra pin at least during electroplating of said short pin.

BACKGROUND

In a variety of electrical or electronic devices, an electrical orelectronic assembly is included such as, for example, motherboards,graphics cards, processor cards, network interface cards, sound cards,other peripheral cards and the like. Typically, such electricalassemblies include one or more circuit boards, such as printed circuitboards (PCBs). Such PCBs are often manufactured to have a particularelectrical layout for a set of electronic components to together formthe electrical or electronic assembly. Electronic components mayinclude, for example, integrated circuit components, such asmicroprocessors and/or memory devices, but may additionally includeother electrical components such as resistors, capacitors, and/orconnectors, such as input/output (I/O) connectors, as just a fewexamples. A circuit board, such as a PCB, may comprise a number oflayers, for example, such as conductive and non-conductive layers, andone or more of the conductive layers may include one or more conductivefeatures, such as traces, pins and/or pads, for example.

Numerous techniques are employed when fabricating or manufacturing acircuit board, such as a PCB. One such technique includes electroplatingto form one or more electrically conductive surfaces in desiredlocations of the board or the assembly. However, depending at least inpart on the location to be electroplated, it may be time consumingand/or expensive to employ such a process. Techniques for electroplatingthat are quicker, less expensive and/or less labor intensive continue tobe desired.

BRIEF DESCRIPTION OF THE DRAWINGS

Subject matter is particularly pointed out and distinctly claimed in theconcluding portion of the specification. The claimed subject matter,however, both as to organization and method of operation, together withobjects, features, and advantages thereof, may best be understood byreference to the following detailed description when read with theaccompanying drawings in which:

FIG. 1 is a schematic diagram illustrating an embodiment of two circuitboards manufactured so as to interconnect;

FIG. 2 is a schematic diagram illustrating a portion of anotherembodiment of a circuit board; and

FIG. 3 is a flowchart illustrating an embodiment of a method ofmanufacturing a circuit board.

DETAILED DESCRIPTION

In the following detailed description, numerous specific details are setforth to provide a thorough understanding of the claimed subject matter.However, it will be understood by those skilled in the art that theclaimed subject matter may be practiced without these specific details.In other instances, well-known methods, procedures, components and/orcircuits have not been described in detail so as not to obscure theclaimed subject matter.

As previously suggested, an electrical or electronic assembly maycomprise one or more electrical or electronic components coupled to asubstrate, such as a circuit board. A printed circuit board (PCB), forexample, may comprise one or more layers, which may comprise laminatedlayers, for example, and may include conductive and/or non-conductivelayers. Likewise, one or more of the conductive layers may include oneor more conductive features formed thereon, for example. Additionally,an electronic assembly may comprise one or more electronic components,including, for example, integrated circuit (IC) components, such as oneor more microprocessors, graphics processing units (GPUs), digitalsignal processors (DSPs), one or more memory devices, one or moreapplication specific integrated circuits (ASICs), and may include othertypes of electronic components, such as capacitors, resistors, and/orconnectors including input/output (I/O) connectors for coupling toexternal circuitry, such as bus circuitry, for example. Of course, theseare simply examples and the claimed subject matter is not limited inscope to these examples.

In at least one example, one or more electronic assemblies may becoupled to form an electronic device. Examples of electronic devices mayinclude, for example, computers, including desktop computers, laptopcomputers, servers, switches, and/or hubs, handheld devices, includingdigital cameras and/or cellular telephones, and may additionally includeperipheral devices, including printers, monitors, and/or scanners, forexample. Those skilled in the art will recognize, however, that theclaimed subject matter is again not limited to these particularexamples.

As indicated above, in at least one particular embodiment, a circuitboard, such as a PCB, may comprise a plurality of layers. In thiscontext, the term circuit board refers to a substrate comprising one ormore layers manufactured so as to have one or more electronic componentsassembled with it to form an electrical or electronic circuit.Typically, for example, the components are attached to such a substrate.Likewise, a printed circuit board comprises a circuit board in which atleast a portion of at least one of the layers of the substrate includesprinted conductive traces for forming one or more such circuits.

In at least one particular embodiment, for example, a circuit board,such as a PCB, may comprise one or more layers of non-conductivematerial interleaved and/or laminated with one or more conductivecircuit patterns and/or one or more additional layers, for example. Inthis embodiment, although the claimed subject matter is not so limited,one or more non-conductive layers of material may include, for example,one or more resins, such as epoxy resins, polymer resins and/or phenolicresins, fibrous material, such as fiberglass, and/or other materialsincluding glass, plastic, carbon, polyimides, polytetrafluoroethylene(PTFE), ceramic and/or quartz, as just a few examples. Thesenon-conductive layers of material may, when assembled to form asubstrate, be at least partially interleaved with one or more conductivelayers, such as one or more layers of conductive circuit patterns, whichmay additionally be referred to as traces and/or signal layers, one ormore ground planes and/or power plane layers, and/or one or more pinsand/or pads, for example.

A conductive layer may comprise a layer at least partially comprisingmetal, wherein the metal may be selectively patterned to provide one ormore interconnections between one or more components and/or one or moreparticular conductive features of the substrate, such as one or morepads and/or connectors, for example, and may be formed on one or moresurfaces of one or more substrate layers, such as a top surface, forexample. Although the claimed subject matter is not so limited, suchconductive features may include or be formed from one or more types ofconductive material, including, for example, copper, gold, silver,platinum, tin, aluminum, palladium, nickel, and/or any combinationsthereof. Of course, again, the claimed subject matter is not so limited,and may at least partially comprise any conductive and/orsemi-conductive material, for example. Additionally, methods for formingone or more conductive features may vary, and the claimed subject matteris not limited to any particular method of forming conductive features,as explained in more detail hereinafter.

As suggested previously, one or more electronic components of anelectronic assembly may be electrically connected to one or more othercomponents of the electronic assembly by a hierarchy of electricallyconductive paths, such as traces. In at least one particular embodiment,one or more conductive layers may be coupled to one or more additionalother conductive layers by use of one or more vias. In this context, theterm via refers to a hole that is formed between one or more layers of asubstrate. In one potential embodiment, such vias may subsequently beplated with conductive material, for example. Thus, one particularexample of a via includes a plated through hole (PTH). Such PTHs mayprovide interconnection between one or more conductive layers, such asbetween one or more circuits. This, therefore, may result in theformation of a substantially electrically continuous circuit spanningone or more layers of a substrate, as just an example.

In the manufacture of a particular electrical or electronic device, itmay be desirable to have the ability to interconnect one or more circuitboards or PCBs, for example, Typically, this may be accomplished by useof one or more I/O connectors, which may provide interconnection betweenone or more electronic components, one or more buses, and/or one or moreelectronic assemblies, for example. The board, for example, may beformed to have one or more I/O connectors, such as one or more slots,and/or one or more pins, such as an array of pins, for example. The oneor more pins, in at least one embodiment, may be configured to beremovably and/or permanently coupled to one or more slots of one or moresuch boards. In this context, electrically and physicallyinterconnecting one or more electronic assemblies formed on circuitboards to one or more additional electronic assemblies formed on circuitboards may be referred to as plugging. For at least one circuit board,for example, a connector may be formed on the board, and may be adaptedto be removably plugged into one or more slots, such as one or moreslots formed on one or more additional boards, for example.

Connectors as described previously, such as pins and/or slots, forexample, may be compatible and/or compliant with a particular connectorprotocol. Such a particular connector protocol may specify mechanicaland/or electrical specifications for the one or more connectors. Forexample, connectors that are configured to be removably plugged into aslot in accordance with a particular connector protocol, for example,may have particular plating and/or finish specifications. Aspecification for such a connector protocol may, for example, detailparticular materials suitable for forming such connectors, and/or mayadditionally specify particular thicknesses as well as other aspects ofthe connectors, for example. Although the claimed subject matter is notso limited, well-known examples of such specifications may includeAccelerator Graphics Port (AGP) specification, Peripheral ComponentInterconnect (PCI) specification, and/or Peripheral ComponentInterconnect Express (PCI-Express) specification, also referred to asthe 3^(rd) Generation Input/Output (3GIO), for example. AGP has beendefined by Intel Corporation of Santa Clara, Calif. under specification3.0, revision 1.0, adopted September, 2002; The PCI specification hasbeen defined by the PCI special interest group (PCISIG), conventionalPCI specification revision 3.0, adopted Apr. 19, 2004; additionally, thePCI-Express specification has been defined by PCISIG, specificationrevision 1.0, adopted Jul. 16^(th), 2002. More information may beobtained on the Internet at the following URL: http://www.pcisig.com,and/or the following address: 5440 SW Westgate Drive #217, Portland,Oreg. 97221.

One example of a manufacturing or fabrication process employed in themanufacture of a circuit board or PCB, particularly those that mayinclude connectors, as previously described, includes the process ofelectroplating. In this context, the term electroplating refers to aprocess in which coating and/or plating is deposited byelectrodeposition, also referred to here as electrolytic plating.Electroplating processes may prove desirable in this context at least inpart because it may produce a coating and/or plating that is relatively,thick, dense and/or may prove relatively resistant to wear, such as mayoccur from the use of connectors and the like. Typically, for example,as will be explained in more detail later, one or more connectors, suchas pins, may be formed from a particular conductive material. Asubsequent process may then form one or more additional materials on atleast a portion of the connector, such as one or more plating layers ofmaterial, for example. Thus, forming one or more additional materiallayers may comprise one or more plating processes, such as one or moreelectroplating processes. Of course, the claimed subject matter is notlimited in scope to electroplating or to forming layers that are eitherdense or resistant to wear. These are simply examples of possiblemanufacturing considerations that may arise in the fabrication of acircuit board.

Of course, numerous techniques and/or materials may be utilized to formone or more boards, and, again, the claimed subject matter is notlimited to any particular materials or techniques. However, in oneparticular embodiment, a substrate layer may be formed, and may comprisea non-conductive layer, such as a layer substantially comprising epoxyresin, polymer resin and/or phenolic resin, for example. The layer maybe formed from a rolling, extruding, molding, pressing and/or machiningprocess, as just a few examples, and may be formed to have particulardimensions. One or more conductive layers may be formed on one or moresurfaces of the substrate layer, such as one or more layers ofconductive material, including a layer of copper foil, for example. Theone or more conductive layers may be formed on one or more sides of thesubstrate layer by use of one or more forming processes, such as one ormore deposition, layering, and/or rolling processes, for example. In oneembodiment, when a layer of conductive material is formed on one or morelayers of a substrate layer, at least a portion of the conductivematerial may be selectively removed, such as to form one or moreconductive features, such as one or more traces, pads, pins, and/orportions of circuitry, for example. This may be referred to as etching,although, the claimed subject matter is not so limited. Additionally,one or more electronic or electrical components may be coupledelectrically and/or physically to the multilayer substrate, such as bysoldering, including reflow soldering, for example, and may be coupledby use of one or more solder ball or bump arrays, for example (notshown). Additionally, one or more portions of the multilayer substratemay be selectively removed, such as to form a connector having aparticular connector profile, such as the connectors illustrated inFIGS. 1 and/or 2, for example. In this embodiment, selective removal ofthe substrate material may be performed by one or more mechanicalprocesses, such as one or more routing, honing, cutting, beveling and/orgrinding processes, although, again, the claimed subject matter is notso limited.

One or more additionally forming processes may be performed on one ormore conductive features, such as after one or more substrates areformed into a multilayer substrate, and/or before removal of at least aportion of the substrate material, for example, although the claimedsubject matter is not limited in this respect. In one embodiment, forexample, as previously suggested, one or more plating processes may beperformed on one or more conductive features, such as one or moreelectrical contacts of a connector, for example. Although the claimedsubject matter is not so limited, in one embodiment, one or more platingprocesses, such as electrolytic and/or electroless plating, may beperformed on at least a portion of one or more conductive features ofone or more substrate layers. Thus, one or more plating processes may beperformed on one or more connectors.

For example, a connector, such as one or more pins, may be formed from aparticular material or combination of materials, such as a copper alloy,for example. One or more of the pins may be formed from one or moredeposition and/or etching processes, such as by forming a layer ofcopper foil on a substrate, and selectively removing portions of thefoil to form one or more pins, for example. Likewise, as previouslysuggested, it may be desirable to increase the thickness of a conductivematerial used to form one or more connectors, and/or the durability ofthe connectors, although the claimed subject matter is not limited inscope in this respect. For example, a plating process, such aselectroplating, may be employed. In one particular embodiment, an arrayof pins, such as illustrated on substrate 122, for example, may beplated, such as by electroplating.

In one particular embodiment, although the claimed subject matter is notso limited, a substrate may be formed with one or more pins or otherelectrical contacts, and the one or more pins or other contacts may beformed from a particular material, such as copper, and may be formed toa particular thickness, such as a thickness substantially within therange of approximately 100–200 microinches (μin), such as approximately150 μin, for example. The one or more pins or other contacts may, forexample, be formed from one or more of the aforementioned processes,such as one or more deposition and/or etching processes, for example.One more additional deposition processes, such as one or more platingprocesses, may be performed. For example, one or more pins or othercontacts may be at least partially plated with nickel, and may be formedto a particular thickness, such as a thickness substantially within therange of approximately 15–45 μin, such as to a thickness ofapproximately 30 μin, for example. Additionally, one or more additionalplating processes may be performed, and the one or more plated pins orother contacts may be at least partially plated with gold, and may beformed to a particular thickness, such as a thickness substantiallywithin the range of approximately 15–45 μin, such as to a thickness ofapproximately 30 μin, for example. These one or more plating processesmay comprise one or more electroplating processes, for example, althoughthe claimed subject matter is not so limited. Additionally, althoughspecific plating thicknesses and materials are described, the claimedsubject matter is not limited to any particular plating thickness and/ormaterial, for example.

Referring now to FIG. 1, a schematic diagram of an embodiment of twocircuit boards, 102 and 104 respectively, is shown. As illustrated, anddescribed in more detail below, in this embodiment, one or moreconnectors are formed on these particular circuit boards. Furthermore,these circuit boards are manufactured to interconnect via connectors 108and 114. Illustrated as part of these boards are connectors 108 and 114,which may have a plurality of electrical contacts formed thereon. Forthis embodiment, these electrical contacts are illustrated as a slot andcorresponding pins or fingers, although, the claimed subject matter isnot limited in scope in this respect. Electrical contacts for aconnector may take any one of a variety of forms, including, withoutlimitation, extensions, pins, fingers, ports, terminals and the like. Ingeneral, any type of electrical contact now known or later developed,regardless of, for example, geometry, material, location, andconductivity, is included within the scope of the claimed subjectmatter.

Circuit board 102, in this embodiment, comprises a substrate 106 with aconnector 108 formed thereon. As previously suggested, substrate 106 maycomprise one or more layers, such as one or more conductive and/ornon-conductive layers, for example (not shown), and may compriselaminated layers, for example. Connector 108, in this particularembodiment, comprises a slot and may be referred to as an I/O slotconnector. Connector 108 may provide electrical connectivity between oneor more components (not shown) to be assembled with substrate 106, suchas one or more buses and/or one or more IC components, for example.Circuit board 104, in this embodiment, comprises a substrate 112 with aconnector 114 formed thereon. Connector 114 in this embodiment comprisesan array of pins, such as pin 116, and may be referred to as an I/O pinarray connector. Of course, these are simply examples of an I/O slotconnector and an I/O pin array connector. Thus, the claimed subjectmatter is not limited in scope to these particular examples.

However, as illustrated, for this particular embodiment, a particularpin pattern or pin out of connector 114 may substantially comprise amirror image of the connector pattern of connector 108, although, again,this is merely an example. Connector 114 may likewise provide electricalconnectivity between one or more components (not shown) to be assembledwith substrate 112, such as one or more buses and/or one or more ICcomponents, for example. Furthermore, in at least one embodiment,connector 108 and/or connector 114 may be formed to comply with one ormore specifications, such as the aforementioned AGP, PCI, and/orPCI-Express specifications, for example.

Referring now to FIG. 2, a schematic diagram illustrating a portion ofanother embodiment of a circuit is provided. Here, FIG. 2 specificallyillustrates a partially formed circuit board. Board 118 here comprises asubstrate 122. Substrate 122 may comprise one or more layers, such asone or more conductive and/or non-conductive layers, for example (notshown), and/or one or more traces, pads and/or pins, such as pins 130,132 and 134, for example. Depending upon the particular situation, board118 may additionally comprise one or more electronic or electricalcomponents, such as, for example, IC components (not shown). Forexample, circuit board 118 may comprise a PCB for a graphics card,although this is merely one example, and the claimed subject matter isnot limited in scope to this particular example.

Illustrated as part of board 118 are connector portions 126 and 128,which may have a plurality of electrical contacts 130 formed thereon, aswell as one or more additional electrical contacts such as short contact132 and extra contact 134. Again, for this embodiment, these electricalcontacts are illustrated as pins or fingers that extend from the board,although, the claimed subject matter is not limited in scope in thisrespect. Electrical contacts may take any one of a variety of forms andany type of electrical contact, now known or later developed, isincluded within the scope of the claimed subject matter.

Additionally illustrated is board outline or outer shape 120, designatedby the segmented line. In this context, the term outer shape or outlineif applied to a circuit board refers to the shape or outline the boardwill have after fabrication to produce the board is substantiallycomplete. Additionally illustrated in this particular embodiment is aplating bar 138, which may at least partially comprise conductivematerial, and may provide a conductive path between one or more pinsformed on board 118, for example. Additionally, a trace 124 may beformed on substrate 122. In this particular embodiment, the term tracerefers to a conductive path formed on the circuit board. Here, trace 124provides electrical coupling between two or more electrical contacts,such as between one or more electrical contacts 130 and/or, 132, andextra contact 134, for example. It is noted that here electrical contact134 extends beyond the outline or outer shape of board 118. Thus, inlater fabrication, this extra contact may be removed, as explained inmore detail below. Any one of a number of techniques to remove the extracontact may be employed and the claimed subject matter is not limited inscope to a particular approach. For example, the contact may be removedby cutting away a portion of the board substrate, such as in anautomated manufacturing operation (routing), for example. Likewise,depending on the placement of the contact relative to the board, the pinmay be removed by beveling along the edge of the board, for example,again, such as in an automated manufacturing operation, although, again,these are simply a few of the possible examples.

In one particular embodiment, extra pin 134 may be electrically coupledto one or more pins that are not connected to plating bar 138, forexample, such as short pin or contact 132. Although not illustrated forthis particular embodiment, it is noted that depending upon theparticular circumstances, additional electrical coupling of betweenvarious pins, other than pin 134 to pin 132, for example mayadditionally be accomplished, such as through one or more traces and/orvias in addition to or alternatively to trace 124, and, although notillustrated, the one or more traces and/or vias may be formed on one ormore layers of the substrate, for example. Thus, for example, it may bedesirable, in some circumstances to include a plurality of extraelectrical contacts, such as pins, fingers, or the like, that may beelectrically connected to other electrical contacts, and may be removedin later fabrication. As will become more clear hereinafter, suchelectrical connections may facilitate the electroplating of electricalcontacts, such as pins or fingers, for example, that otherwise may bemore expensive, time consuming and/or labor intensive to electroplate,for example.

For example, in this embodiment, as illustrated in FIG. 2, an electricalcontact of board 118, here pin 132, is shorter in length than otherelectrical contacts, such as pins 130, for example. In particular,although the claimed subject matter is not limited in scope in thisrespect, in accordance with the PCI-Express specification, the otherpins are a standard length while pins A1 and B81 are shorter than thisstandard length and are connected in the schematic and by a trace on theactual PCB. If they were not connected in this way an additional pincould be added to facilitate the electroplating of that shorter fingerand routed or removed in creating the final board outline. Thus, here,the electrical contacts are formed to comply with the electrical and/ormechanical specifications of the aforementioned PCI-Expressspecification, although, again, the claimed subject matter is notlimited in scope in this respect. For example, the claimed subjectmatter is not limited to any particular type and/or number of connectorportions or pins, any particular pin or contact length and likewise isnot limited to a board comprising pins and/or connector portions.

In one particular embodiment, a method of making one or more of theaforementioned embodiments is illustrated in FIG. 3. FIG. 3 illustratesa flowchart 140, with numerous blocks. However, the claimed subjectmatter is not so limited, the order in which the particular operationsare presented does not necessarily imply a particular order ofoperation, and the claimed subject matter may comprise one or moremethods comprising one or more of the following operations, and maycomprise additional intervening, substitute, and/or subsequentoperations. At a high level, one or more substrate layers may be formedas indicated by block 142. At block 144, one or more substrate layersmay be stacked. At block 146, one or more additional depositionprocesses, such as one or more plating processes, may be performed onone or more portions of one or more substrate layers. At block 148, oneor more portions of one or more substrate layers may be removed, such asselectively, for example.

More specifically, in this embodiment, one or more substrate layers maybe formed as indicated at block 142. A substrate layer, in thisembodiment, may comprise a conductive and/or non conductive layer ofmaterial, and may comprise one or more materials, such as one or moreepoxy resins, polymer resin and/or phenolic resins, and/or one or moretypes of conductive material, including copper, gold, silver, platinum,tin, aluminum, palladium, nickel, and/or alloys thereof, for example.One or more conductive features may be formed on one or more substratelayers, such as one or more pads, pins, and/or one or more plating bars,for example. Methods of forming one or more substrate layers may vary,but may include, for example, one or more rolling, extruding, molding,pressing and/or machining process, and/or one or more plating,deposition, and/or etching processes, such as mechanical and/or chemicaletching, for example.

As indicated at block 144, one or more of the substrate layers formed atblock 142 may be at least partially fabricated by stacking one onanother. In one embodiment, two or more substrate layers, such as one ormore conductive layers and/or one or more non-conductive layers, may befabricated, and this may comprise laminating, for example, and the twoor more layers may be fabricated to at least partially form a circuit,such as illustrated in FIGS. 1 and/or 2, for example. Additionally, aspart of the fabrication process of block 144, one or more vias may beformed, and/or one or more electrical or electronic components, such asone or more IC components and/or one or more connectors such as a slot,including a PCI-Express I/O slot, for example, may be coupled to one ormore of the substrate layers, for example.

In this embodiment, as indicated at block 146, one or more materials maybe deposited. This may include, for example, one or more depositionprocesses, such as electroplating and/or electroless plating, forexample, or may comprise one or more additional types of depositionprocesses, but the claimed subject matter is not so limited. Forexample, in one particular embodiment, one or more portions of one ormore substrate layers may be provided with material, such as providingone or more connectors with plating material, for example. In thisembodiment, one or more connectors, such as one or more contacts, may beformed, such as indicated at block 144, as previously described. The oneor more contacts may be provided with one or more additional conductivematerials, such as by plating. Thus, in this embodiment, one or morepins or other contacts may be formed from copper, such as copper foil,for example. One or more additional materials, such as nickel and/orgold, for example, may be plated on to at least a portion of the one ormore pins or other contacts, such as to a particular thickness orthicknesses, for example.

In this embodiment, electroplating may be utilized to deposit one ormore materials, and may be substantially performed in the followingmanner: One or more pins or other contacts may be provided withelectrical energy, such as by coupling a power source to one or morepins or other contacts, such as, for example, via a plating bar, and/ortrace, as previously described with respect to FIG. 2. The one or morepins or other electrical contacts being provided with electrical energymay be at least partially provided with an electrolytic solution, suchas by being immersed in a solution, for example, and this may result inat least a portion of a material in solution being plated to the one ormore pins or other contacts being provided with electrical energy, forexample.

In one embodiment, referring now to FIG. 2, one or more pins, such aspins 130, pin 132 and/or pin 134, may be plated, such as byelectroplating. In this embodiment, an electrical power source may beprovided to one or more of the pins, such as by coupling an electricallead from the power source to a portion of the one or more pins, such asthe outside edge of one or more pins, such as by use of a plating bar,although this is not a requirement. In one embodiment, an electricallead may be configured to contact the edges of an array of pins, such aspins 130, for example. However, in one embodiment, wherein one or morepins are shorter than a length, such as a standard length, for example,such as pin 132, potentially, for example, the electrical lead and/orthe plating bar may not contact the shorter pin, resulting in theshorter pin not being plated, for example. In one embodiment, a pin,such as extra pin 134, may be formed to be electrically coupled to oneor more shorter pins, such as by one or more traces, for example, andmay be longer than the shorter pins, such as a standard pin length, forexample. In this embodiment, an electrical lead may contact pins 130 andextra pin 134, for example, and, thereby, electrical energy may beprovided to short pin 132, even though the electrical lead from thepower may not be in physical contact with pin 132, for example.Although, of course, this is just one possible embodiment of the claimedsubject matter and other potential embodiments are, therefore, notlimited in this respect.

In this embodiment, at block 148, one or more portions of the layers maybe removed. One or more layers, such as one or more conductive and/ornon-conductive layers, may be fabricated into a multilayer substrate,for example. As part of the formation process, as described with respectto block 146, one or more additional processes, such as one or moredeposition processes, including electroplating, may be performed on atleast a portion of the one or more substrate layers. However, asindicated at this block 148, a portion of the substrate may be removed,to produce a board outline and/or outer shape, such as board outline 120of FIG. 2, for example. Although numerous methods exist for removing atleast a portion of one or more substrate layers, including one or morerouting, honing, beveling, cutting, and or grinding processes, in oneparticular embodiment, a substrate may be formed from a plurality oflayers, and one or more portions of one or more layers may be removed byuse of one or more routing processes, for example. In one embodiment,removal of one or more portions of a substrate may also remove one moreextra electrical contact, such as pins, that were previously employed inconnection with an electroplating process, for example.

It will, of course, also be understood that, although particularembodiments have just been described, the claimed subject matter is notlimited in scope to a particular embodiment or implementation. In thepreceding description, various aspects of the claimed subject matterhave been described. For purposes of explanation, specific numbers,systems and/or configurations were set forth to provide a thoroughunderstanding of the claimed subject matter. However, it should beapparent to one skilled in the art having the benefit of this disclosurethat the claimed subject matter may be practiced without the specificdetails. In other instances, well-known features were omitted and/orsimplified so as not to obscure the claimed subject matter. Whilecertain features have been illustrated and/or described herein, manymodifications, substitutions, changes and/or equivalents will now occurto those skilled in the art. It is, therefore, to be understood that theappended claims are intended to cover all such modifications and/orchanges as fall within the true spirit of the claimed subject matter.

1. A printed circuit board, comprising: a substrate, wherein saidsubstrate comprises one or more layers; a plurality of connectors formedon one or more layers of said substrate, wherein at least one connectorincludes at least one short pin and at least one extra pin; said atleast one extra pin extending beyond an outer shape of said printedcircuit board after fabrication; and connection circuitry formed on oneor more layers of said substrate, wherein said connection circuitry isconfigured to electrically connect said short pin with said extra pin atleast during electroplating of said short pin.
 2. The printed circuitboard of claim 1, wherein said substrate comprises at least one materialselected from a group of materials consisting essentially of: epoxyresin, polymer resin, phenolic resin, fiberglass, glass, plastic,carbon, polyimide, polytetrafluoroethylene (PTFE), ceramic, quartz,copper, gold, silver, platinum, tin, aluminum, palladium, or nickel. 3.The printed circuit board of claim 1, wherein at least one of saidplurality of connectors is substantially PCI-express specificationcompliant.
 4. The printed circuit board of claim 1, wherein said printedcircuit board comprises electronic components attached to said printedcircuit board and coupled so as to form a peripheral electronicassembly.
 5. The printed circuit board of claim 4, wherein saidperipheral electronic assembly comprises a graphics card.
 6. The printedcircuit board of claim 1, wherein said outer shape includes at least 4substantially straight edges.
 7. The printed circuit board of claim 6,wherein said at least 4 substantially straight edges form asubstantially rectangular shape.
 8. The printed circuit board of claim1, wherein said at least one extra pin is positioned so that it can beremoved after fabrication.